臺灣博碩士論文加值系統

本論文總共提出一種改良式CMOS參考電壓電路，以及兩種不同架構的差動模式BiCOMS參考電壓電路。根據不同的電路架構與製程參數可以組成許多不同型態的參考電壓電路。本論文對於各種電路進行分析與探討以瞭解各種電路的效能。第一種電路是利用MOSFET臨界電壓具有的負溫度係數特性以及BJT基射極電壓之負溫度係數特性所產生。第二種電路是利用MOSFET臨界電壓具有的負溫度係數特性以及BJT模組所產生的正溫度係數特性而產生。第三種電路則是利用MOSFET臨界電壓具有的負溫度係數特性以及MOSFET模組偏壓於弱反轉區時產生的正溫度係數特性產生。上述三種不同架構的電路，皆以適當的權重比例將溫度係數相互抵消來實現具有零溫度係數特性的參考電壓。

本論文提出的各種參考電壓電路均使用TSMC 0.18微米製程參數進行佈局，並利用HSPCIE與ADE(Analog Design Environment)兩種模擬軟體去進行佈局前與佈局後模擬，佈局前與佈局後模擬結果皆與設計理論相符合，也證明電路的可行性。本論文提出的三種參考電壓電路均不需使用運算放大器，所以電路架構簡單，使用較少的元件與晶片面積，可節省製造成本。本論文提出的參考電壓電路可做為電路模組應用於各種電路設計當中。

In this thesis, we have proposed a CMOS reference voltage circuit and two different types of BiCMOS differential-mode reference voltage circuits. Different circuit architecture and process parameters have been used to implement a number of different circuits. Also the performances of all the proposed circuits have been carefully analyzed and examined. In order to realize the zero temperature-coefficient, the first proposed circuit uses the negative temperature-coefficients which are obtained from the base to emitter voltage of a BJT and the threshold voltage of a MOSFET, respectively, to cancel each other. The second proposed circuit uses the positive and negative temperature-coefficients given from a BJT module and the threshold voltage of a MOSFET, respectively, to cancel each other. Finally, the third proposed circuit demonstrates that the zero temperature-coefficient can be reached by using the positive and negative temperature-coefficients from a MOSFET module and the threshold voltage of a MOSFET, respectively.

In this thesis, all the proposed circuits have been implemented by using the 0.18μm process parameters. The HSPICE and ADE (Analog Design Environment) simulation programs have been used to perform the pre-layout and post-layout simulations. Both the pre-layout and post-layout simulation results are consistent with the design theory, and also prove the validity of the proposed circuits. Moreover there is no operational amplifier used in all the proposed designs which leads to simpler circuit architecture, less number of electronic devices and therefore smaller chip area consumption and Consequently less production cost can be expected. All the proposed circuits are suitable to be applied to different circuit designs as circuit modules.

摘要...i
Abstract...ii
誌謝...iii
目錄...iv
表目錄...vi
圖目錄...vii
符號說明...x
第一章 緒論...1
1.1積體電路產業的發展與研究動機...1
1.2設計流程...1
1.3研究方向與重點...3
1.4論文架構簡介...3
第二章 傳統參考電壓電路...4
2.1參考電壓簡介...4
2.2參考電壓工作原理...4
2.3 BJT參考電壓電路架構...6
‧2.3.1負溫度係數特性...6
‧2.3.2正溫度係數特性...7
‧2.3.3 BJT參考電壓電路...8
2.4 MOSFET參考電壓電路架構...10
‧2.4.1 弱反轉區與溫度特性...10
‧2.4.2 MOSFET參考電壓電路...11
第三章 差動式CMOS參考電壓分析與設計實務...13
‧3.1 傳統差動模式參考電壓電路設計...13
‧3.2 第一種差動式CMOS參考電壓電路...15
‧3.2.1 第一種差動式CMOS參考電壓電路分析...15
‧3.2.2 第一種差動式CMOS參考電壓電路模擬結果...17
‧3.3 第二種差動式CMOS參考電壓電路...20
‧3.3.1 第二種差動式CMOS參考電壓電路分析...20
‧3.3.2 第二種差動式CMOS參考電壓電路模擬結果...21
‧3.4 第三種差動式CMOS參考電壓電路...23
‧3.4.1 第三種差動式CMOS參考電壓電路分析...24
‧3.4.2 第三種差動式CMOS參考電壓電路模擬結果...25
‧3.5 三種差動式CMOS參考電壓電路模擬結果整理與討論...28
第四章 混合式CMOS參考電壓分析與設計實務...29
‧4.1 第一種混合式CMOS參考電壓電路...29
‧4.1.1 第一種混合式CMOS參考電壓電路分析...30
‧4.1.2 第一種混合式CMOS參考電壓電路模擬結果...31
‧4.2 第二種混合式CMOS參考電壓電路...33
‧4.2.1 第二種混合式CMOS參考電壓電路分析...33
‧4.2.2 第二種混合式CMOS參考電壓電路模擬結果...33
‧4.3 第三種混合式CMOS參考電壓電路...36
‧4.3.1 第三種混合式CMOS參考電壓電路分析...37
‧4.3.2 第三種混合式CMOS參考電壓電路模擬結果...38
‧4.4 三種混合式CMOS參考電壓電路模擬結果整理與討論...41
第五章 晶片實作與量測結果...42
‧5.1 全客製化IC...42
‧5.2 量測儀器與流程...44
‧5.3 第一種差動式CMOS參考電壓電路晶片實體與量測結果...45
‧5.3.1 晶片實體...45
‧5.3.2 晶片量測...46
‧5.4 第二種差動式CMOS參考電壓電路晶片實體與量測結果...51
‧5.4.1 晶片實體...51
‧5.4.2 晶片量測...52
‧5.5 第三種差動式CMOS參考電壓電路晶片實體與量測結果...57
‧5.5.1 晶片實體...57
‧5.5.2 晶片量測...58
‧5.6 第一種混合式CMOS參考電壓電路晶片實體與量測結果...63
‧5.6.1 晶片實體...63
‧5.6.2 晶片量測...64
‧5.7 第二種混合式CMOS參考電壓電路晶片實體與量測結果...66
‧5.7.1 晶片實體...66
‧5.7.2 晶片量測...67
‧5.8 第三種混合式CMOS參考電壓電路晶片實體與量測結果...69
‧5.8.1 晶片實體...69
‧5.8.2 晶片量測...70
第六章 結論與討論...72
參考文獻...73
Extended Abstract...75

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