臺灣博碩士論文加值系統

本論文提出一個應用於 SATA-III 的展頻時脈產生器，此架構採用洋蔥波作為三角積分調變器的調變波形，該洋蔥波由使用片段線性技術之洋蔥波產生器提供，其擁有多個可調變計數數值與計數頻率，使其能產生多個不同的斜率提供給輸出波形使用，在選擇恰當的斜率的情況下，能使輸出波形有更精細的變化，產生更加接近理想洋蔥波的波形，進而使展頻頻譜的能量散佈得更平均，擁有更佳的EMI抑制量。此外亦對三角積分調變器做改良，使展頻頻譜在展頻範圍內能量分布更平均，以解決先前團隊研究中因三角積分調變器產生之展頻頻譜塌陷問題。
本論文使用的電壓源為 1.8V，輸出時脈的基礎頻率為 6GHz，核心電路的總功耗為24.3mW，成功實現低功耗的 SATA-III 展頻時脈產生器。測試晶片實現於台積電0.18um製程 ( 1P6M )，核心電路的面積為0.517*0.463 mm2。功率密度頻譜的中心頻率上的峰值約可被降低12.09 dB。

This paper proposes a spread-spectrum clock generator (SSCG) that can be applied in SATA-III system. The onion wave is used as the modulation waveform of the delta-sigma modulator. The onion wave is provided by the onion wave generator using piecewise linear technology with adjustable count value and count frequency in order to generate different slopes for onion wave. With the appropriate slope, the onion wave can be changed more precisely, and produces a waveform closer to the ideal onion wave. The solution makes the energy of the spectrum more flat so that the EMI reduction can be better. In addition, the delta-sigma modulator is improved to make the energy distribution of the spread spectrum more flat. Thus, the problem of spread spectrum being sunken caused by delta-sigma modulator is solved.

In this paper, the voltage source is 1.8V, and the fundamental frequency of the output clock is 6GHz. The total consumption of core circuit is only 24.3mW. A low power consumption SATA-III spread-spectrum clock generator is successfully implemented. The peak value of center frequency in the power density spectrum can be reduced to about 12.09dB.

誌 謝 I
中文論文提要 II
英文論文提要 III
目 錄 IV
圖目錄 VI
表目錄 X
第1章 緒 論 1
1-1 研究動機與目的 1
1-2 論文章節架構 3
第2章 先前技術探討 4
2-1 電磁干擾與解決方法 4
2-2 展頻時脈概念 4
2-3 三角積分調變技術 9
2-4 洋蔥波型調變簡介 10
第3章 展頻時脈產生器電路設計 13
3-1 SATA-III規格介紹 13
3-2 本論文設計概觀 15
3-3 相位頻率偵測器（Phase Frequency Detector）[10] 17
3-4 差動充電泵與共模回授機制 ( Differential Charge Pump with CMFB) [10] 21
3-5 迴路濾波器 ( Loop Filter, LF) 28
3-6 折疊式全差動電壓控制振盪器(Folded Cascode Fully Differential VCO) [11] 33
3-7 預除器 ( Prescaler )[10] 44
3-8 相位切換除頻器 ( Phase Switch Divider) [11] 47
3-9 三角積分調變器 ( Delta-Sigma Modulator) 54
3-10 片段線性洋蔥波產生器(Piecewise Linear Onion Wave Generator) 61
第4章 電路佈局模擬 72
4-1 展頻時脈產生器量測考量 72
4-2 展頻時脈產生器電路佈局 74
4-3 展頻時脈產生器佈局前和佈局後模擬比較 80
4-4 文獻比較 82
4-5 晶片量測規劃 83
4-6 量測結果與檢討 85
第5章 結論與未來研究方向 89
5-1 結論 89
5-2 未來研究方向 89
參考文獻 91
著作權聲明 95

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