|
[1]I. Lee, G. Kim and W. Kim, “Exponential curvature-compensated BiCMOS bandgap references,” IEEE Journal of Solid-State Circuits, vol. 29, no. 11, pp. 1396-1403, Nov. 1994. [2]A. J. Annema, “Low-power bandgap references featuring DTMOST’s,” IEEE Journal of Solid-State Circuits, vol. 34, no. 7, pp. 949-955, Jul. 1999. [3]B. Razavi, Design of Analog CMOS Integrated Circuits, McGRAW-HILL, 2000. [4]Y. Jiaiig and E. K. P. Lee, “Design of low-voltage bandgap reference using transimpedance amplifier,” IEEE Transactions on Circuits and Systems II, vol. 47, pp.552-555, Jun. 2000. [5]A. Bakker and J. Huijsing, High-accuracy CMOS smart Temperature Sensors, Paperback, Springer, 2001. [6]A. E. Buck, C. L. McDonald, S. H. Lewis and T. R. Viswanathan, “A CMOS bandgap reference without resistors,” IEEE Journal of Solid-State Circuits, vol. 37, no. 1, pp. 81-83, Jan. 2002. [7]K. N. Leung, P. K. T. Mok, and C. Y. Leung, “A 2-V 23-μA 5.3-ppm/°C curvature-compensated CMOS bandgap voltage reference,” IEEE Journal of Solid-State Circuits, vol. 38, pp. 561-564, Mar. 2003. [8]A. B. Gomez, T. L. Viswanathan, and T. R. Viswanathan, “A low-supply-voltage cmos sub-bandgap reference,” IEEE Transactions on Circuits and Systems II, vol. 55, no. 7, pp. 609-613, July 2008. [9]J. M. Redout’e and M. Steyaert, “Kuijk bandgap voltage reference with high immunity to emi,” IEEE Transactions on Circuits and Systems II, vol. 57, no. 2, pp. 75-79, Feb. 2010. [10]X. Ming, Y. Q. Ma, Z. K. Zhou, and B. Zhang, “A high-precision compensated cmos bandgap voltage reference without resistors,” IEEE Transactions on Circuits and Systems II, vol. 57, no. 10, pp. 767-771, Oct. 2010. [11]R. Hongal and R. B. Shettar, “Design and implementation of curvature corrected bandgap voltage reference-1.1V using 180nm technology,” IEEE International Conference on Communication Control and Computing Technologies (ICCCCT), pp. 294-299, Oct. 2010. [12]J. Jiang, Z. Ning and L. He, “A curvature compensated bandgap reference with low drift and low noise,” International Symposium on Integrated Circuits, pp.547-550, 2011. [13]Z. K. Zhou, Y. Shi, Z. Huang, P. S. Zhu, Y. Q. Ma, Y. C. Wang, Z. Chen, X. Ming and B. Zhang “A 1.6-V 25-μA 5-ppm/°C curvature-compensated bandgap reference,” IEEE Transactions on Circuits and Systems I, vol. 59, no. 4, pp. 677-684, Apr. 2012. [14]A. Martinez-Nieto, M. T. Sanz-Pascual, P. Rosales-Quintero and Santiago Celma, “A bandgap voltage reference in 0.18μm CMOS Technology,” IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 97-100, Aug. 2013. [15]B. M. McCue, B. J. Blalock, C. L. Britton, J. Potts, J. Kemerling, K. Isihara and M. T. Leines, “A wide temperature, radiation tolerant, CMOS-compatible precision voltage reference for extreme radiation environment instrumentation systems,” IEEE Transactions on Nuclear Science, vol. 60, no. 3, pp. 2272-2279, Jun. 2013. [16]B. L. Hunter and W. E. Matthews, “A ± 3 ppm/°C single-trim switched capacitor bandgap reference for battery monitoring applications,” IEEE Transactions on Circuits and Systems I, vol. 64, no. 4, pp. 777-785, April 2017. [17]L. Liu, X. Liao, and J. Mu, “A 3.6μVrms noise, 3 ppm/°C TC bandgap reference with offset/noise suppression and five-piece linear compensation,” IEEE Trans. Circuits Syst. I, vol. 66, no. 10, pp. 3786-3796, Oct. 2019. [18]G. A. Rincon-Mora and P. E. Allen, “A 1.1-V current-mode and piecewise-linear curvature-corrected bandgap reference,” IEEE Journal of Solid-State Circuits, vol. 33, no. 10, pp. 1551-1554, Oct. 1998. [19]H. Banba, H. Shiga, A. Umezawa, T. Miyaba, T. Tanzawa, S. Atsumi and K. Sakui, “A CMOS bandgap reference circuit with sub-1-V operation,” IEEE Journal of Solid-State Circuits, vol. 34, no. 5, pp. 670-674, May 1999. [20]I. M. Filanovsky and A. Allam, “Mutual compensation of mobility and threshold voltage temperature effects with applications in CMOS circuits,” IEEE Transactions on Circuits and Systems I, Fundamental Theory and Applications, vol. 48, no. 7, pp. 876-884, Jul. 2001. [21]P. Malcovati, F. Maloberti, C. Fiocchi and M. Pruzzi, “Curvature-compensated BiCMOS bandgap with 1-V supply voltage,” IEEE Journal of Solid-State Circuits, vol. 36, no. 7, pp. 1076-1081, Jul. 2001. [22]K. N. Leung and P. K.T. Mok, “A sub-1-V 15-ppm/°C CMOS bandgap voltage reference without requiring low threshold voltage device,” IEEE Journal of Solid-State Circuits, vol. 37, no. 4, pp. 526-630, Apr. 2002. [23]G. Giustolisi, G. Palumbo, M. Criscione and F. Cutri, “A low-voltage low-power voltage reference based on subthreshold mosfets,” IEEE Journal of Solid-State Circuits, vol. 38, no. 1, pp. 151-154, Jan. 2003. [24]J. Sheng, Z. Chen, and B. Shi, “A 1V supply area effective CMOS bandgap reference,” International Conference on ASIC, 2003.Proceedings, vol. 1, pp. 619-622, Oct. 2003. [25]A. Bendali and Y. Audet, “A 1-V CMOS current reference with temperature and process compensation,” IEEE Transactions on Circuits and Systems I, vol. 54, no. 7, pp. 1424-1429, Jul. 2007. [26]R. T. Perry, S. H. Lewis, A. P. Brokaw and T. R. Viswanathan, “A 1.4 V supply CMOS fractional bandgap reference,” IEEE Journal of Solid-State Circuits, vol. 42, no. 10, pp. 2180-2186, Oct. 2007. [27]Y. H. Lam and W. H. Ki, “CMOS bandgap references with self-biased symmetrically matched current–voltage mirror and extension of sub-1-V design,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 18, no. 6, pp. 857-865, Jun. 2010. [28]J. H. Li, X. B. Zhang and M. Y. Yu, “A 1.2-V piecewise curvature-corrected bandgap reference in 0.5μm CMOS process,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 19, no. 6, pp. 1118-1122, Jun. 2011. [29]G. Ge, C. Zhang, G. Hoogzaad, and K. A. A. Makinwa, “A single-trim CMOS bandgap reference with a 3σinaccuracy of ±0.15% from -40°C to 125°C,” IEEE Journal of Solid-State Circuits, vol. 46, no. 11, pp. 2693-2701, Nov. 2011. [30]C. M. Andreou, S. Koudounas and J. Georgiou, “A novel wide-temperature-range, 3.9 ppm/°C CMOS bandgap reference circuit,” IEEE Journal of Solid-State Circuits, vol. 47, no. 2, pp. 574-581, Nov. 2012. [31]Y. Osaki, T. Hirose, N. Kuroki and M. Numa, “1.2-V supply, 100-nW, 1.09-V bandgap and 0.7-V supply, 52.5-nW, 0.55-V subbandgap reference circuits for nanowatt CMOS lsis,” IEEE Journal of Solid-State Circuits, vol. 48, no. 6, pp. 1530-1538, Jun. 2013. [32]B. Ma and F. Yu, “A novel 1.2–V 4.5-ppm/°C Curvature-compensated CMOS bandgap reference,” IEEE Transactions on Circuits and Systems I, vol. 61, no. 4, pp. 1026-1035, Apr. 2014. [33]K. K. Lee, T. S. Lande, and P. D. Hafliger, “A sub-μW Bandgap reference circuit with an inherent curvature-compensation property,” IEEE Transactions on Circuits and Systems I, vol. 62, no. 1, pp. 1-9, Jan. 2015. [34]Q. Duan, and J. Roh, “A 1.2–V 4.2-ppm/°C high-order curvature-compensated CMOS bandgap reference,” IEEE Transactions on Circuits and Systems I, vol. 62, no. 3, pp. 662-670, March 2015. [35]C. M. Andreou, and J. Georgiou, “A 0.75V, 4uW, 15ppm/°C, 190°C temperature range, voltage reference,” International Journal of Circuit Theory and Applications, pp. 1029-1038, Aug. 2015. [36]J. Jiang, W. Shu, and J. S. Chang, “A 5.6 ppm/°C temperature coefficient, 87-dB PSRR, sub-1V voltage reference in 65-nm cmos exploiting the zero-temperature-coefficient point,” IEEE Journal of Solid-State Circuits, vol. 52, no. 3, pp. 623-633, March 2017. [37]P. Luong, C. Christoffersen, C. R. Aicardi, and C. Dualibe, “Nanopower, sub-1V, cmos voltage references with digitally-trimmable temperature coefficients,” IEEE Transactions on Circuits and Systems I, vol. 64, no. 4, pp. 787-798, April 2017. [38]B. L. Hunter and W. E. Matthews, “A ± 3 ppm/°C single-trim switched capacitor bandgap reference for battery monitoring applications,” IEEE Transactions on Circuits and Systems I, vol. 64, no. 4, pp. 777-785, April 2017. [39]H. M. Chen, C. C. Lee, S. H. Jheng, W. C. Chen, and B. Y. Lee, “A sub-1 ppm/°C precision bandgap reference with adjusted-temperature-curvature compensation,” IEEE Transactions on Circuits and Systems I, vol. 64, no. 6, pp. 1308-1317, Jun. 2017. [40]L. Liu, J. Mu, and Z. Zhu, “A 0.55-V, 28- ppm/°C, 83-nW cmos sub-bgr with ultralow power curvature compensation,” IEEE Transactions on Circuits and Systems I, vol. 65, no. 1, pp. 95-106, Jan. 2018. [41]R. Wang, W. Lu, M. Zhao, Y. Niu, Z. Liu, Y. Zhang, and Z. Chen, “A sub-1 ppm/°C current-mode cmos bandgap reference with piecewise curvature compensation,” IEEE Transactions on Circuits and Systems I, vol. 65, no. 3, pp. 904-913, March 2018. [42]C. C. Lee, Hou-Ming Chen, C. C. Lu, B. Y. Lee, H. C. Huang, H. S. Fu, and Y. X. Lin, “A high-precision bandgap reference with a v-curve correction circuit,” IEEE Access, vol. 8, no.1, pp. 62632-62638, April 2020.
|