扇出型封裝是一種應用廣泛且效益顯著的封裝技術，除可大幅提高接腳(I/O)密度，其亦可有效縮小封裝體之體積。然而，其封裝體自身因為異質材料間熱膨脹係數不同而引發的封裝體翹曲(warpage)與伴隨而來的熱應力破壞問題將對產品製造階段及後續信賴性測試產生衝擊。
本研究將分為兩部分，實驗部分為利用微拉力材料試驗機針對封裝體中之絕緣介電層聚酰亞胺（Polyimide, PI）薄膜材料進行拉伸實驗，將於PI薄膜材料後方黏貼方格紙以利拉伸測試並獲取更穩定之材料機械性質。此外，將在微拉力材料試驗機上安裝恆溫箱，探討PI薄膜材料於不同溫度條件下之機械性質變化。分析部分為使用扇出型覆晶球陣列封裝(Fan Out-Flip Chip-Ball Grid Array)作為本次研究的分析載具，探討後熟化製程之熱負載影響所造成翹曲行為下銅柱凸塊(Cu pillar bump)應力值之變化，及封裝體接受溫度循環測試(Thermal Cycling Test)時銅柱凸塊之可靠性。再者，利用微拉力材料試驗機量測PI薄膜材料之機械性質與基板中重分佈層(Redistribution Layer)按照銅線路設計依比例求得等效材料特性，並帶入建立之數值分析模型中進行分析。最後，針對封裝體之環氧樹脂封膠厚度、銅覆蓋率與晶片厚度進行實驗設計，探討封裝體在不同幾何設計下銅柱凸塊破裂之風險，並利用反應曲面法求其影響銅柱凸塊疲勞破壞之因子並獲得幾何設計之優化參數組合，藉以降低銅柱凸塊應力並提高封裝結構之可靠性。

Fan-out package is a prevalent and efficient packaging method that could substantially increase more (I/O) connections and generate tinier package size. However, the warpage of the package caused by the mismatch of coefficients of thermal expansion between different materials and the resulting thermal stress damage will have an impact on the following manufacturing processes and product reliability.
This study has been decided into two parts, First, Use the MTS Acumen (micro force tensile machine)to conduct a tensile test on polyimide(PI) film which is used for the dielectric layer material in the package. Furthermore, a thermal chamber is set down to investigate the PI material characteristics under several temperature conditions. In the second part, the analysis would use the FOFCBGA(Fan-out flip chip ball grid array)package as the analysis vehicle to analyze the warpage of the package. The analysis is investigated to examine the stress contour of the copper pillar bump and the reliability of the copper pillar bump by TCT(thermal Cycling Test)under the thermal load of post-mold cure. The equivalent material property that mixed the mechanical property of PI film gained by the tensile testing machine in proportion with the copper circuit design of the redistribution layer in the substrate would be input into the finite element analysis model. To investigate the risk of the cracking failure of the copper pillar bump, the finite analysis model would change the design of the dominant geometry such as compound thickness, copper coverage, and die thickness in the design of experiments, then using the Response Surface Methodology to identify the factors that influence the cracking failure and get an optimized combination of parameters that reduce stress on the copper pillar bump and enhance the reliability of the package’s structure.

摘要 ...i
Abstract ...ii
誌謝 ...iv
目錄 ...v
表目錄 ...vii
圖目錄 ...viii
首字母縮略詞 ...x
符號說明 ...xi
第一章　緒論 ...1
1.1 前言 ...1
1.2 文獻回顧 ...1
1.2.1 高分子薄膜材料拉伸實驗 ...2
1.2.2 電子封裝熱應力分析 ...4
1.3 研究目的與動機 ...6
第二章　電子封裝介紹 ...8
2.1 IC封裝演進及趨勢 ...8
2.1.1 金屬導線架封裝 ...9
2.1.2 塑膠載版封裝 ...10
2.2 FCBGA封裝製程概述 ...12
2.2.1 晶圓植入凸塊 ...12
2.2.2 晶圓背面研磨 ...13
2.2.3 晶圓切割 ...14
2.2.4 覆晶結合與回流銲 ...14
2.2.5 底部填充膠 ...15
2.2.6 封膠 ...15
2.2.7 後熟化烘烤 ...16
2.2.8 蓋印 ...16
2.2.9 封裝切割 ...17
第三章　黏塑性變形理論 ...18
3.1 基本構成方程式 ...18
第四章　高分子薄膜拉伸試驗 ...21
4.1 實驗前製備 ...21
4.2 實驗設置 ...25
4.3 實驗結果與討論 ...27
第五章　FO-FCBGA封裝熱循環疲勞分析 ...29
5.1 封裝結構模型 ...29
5.1.1 晶片端(Die side) ...29
5.1.2 基板端(Substrate side) ...30
5.2 模型邊界設定 ...32
5.3 FO-FCBGA封裝分析結果與溫度循環分析 ...33
5.3.1 分析結果驗證 ...33
5.3.2 溫度循環測試 ...34
第六章　FO-FCBGA封裝優化設計與分析 ...38
6.1 實驗設計與分析方法 ...38
6.1.1 反應曲面法 ...38
6.2 反應曲面分析結果與討論 ...41
6.2.1 回歸模型檢定與因子顯著分析 ...44
6.2.2 反應曲面分析 ...44
6.2.3 反應曲面優化分析結果 ...46
第七章　結論與未來展望 ...48
7.1 結論 ...48
7.1.1 高分子材料拉伸試驗 ...48
7.1.2 FO-FCBGA封裝有限元素分析及優化 ...48
7.2 未來展望 ...49
參考文獻 ...50
Extended Abstract ...53

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