本論文主要提出兩種差動模式BiCMOS參考電壓電路及一種單端輸出BiCMOS參考電壓電路。第一種電路是利用單顆BJT本身負溫度係數特性以及MOSFET臨界電壓所產生負溫度係數；第二種電路是利用BJT模組之基射極接面電壓差來產生正溫度係數以及單顆BJT本身負溫度係數特性而產生。第三種電路則是利用MOSFET模組偏壓於弱反轉區而產生的正溫度係數特性以及MOSFET臨界電壓所產生負溫度係數。以上三種不同類型的電路，主要是將二種溫度係數以適當的權重比相互抵銷，而產生出零溫度係數特性之參考電壓，再依照不同電路來使用不同的電路元件以及使用不同的製程參數來去實現電路，使電路輸出不受溫度變化所影響。

本論文提出的所有電路使用二種不同的製程，分別是TSMC 0.35微米以及TSMC 0.18微米製程參數來實作晶片，更利用二種不同電路軟體，分別是HSPICE和Virtuoso ADE (Analog Design Environment)來做佈局前/後模擬，並且下線製作。佈局前/後模擬結果都與理論相符，證明了電路的可行性。本論文提出之參考電壓電路主要是降低電源電壓變動對輸出電壓產生的影響，觀察±0.1V時的輸出電壓變化，且電路皆不需要使用運算放大器，電路架構簡單，使用最少的晶片面積以節省製造成本。本論文提出之參考電壓電路可應用於各種電路設計。

Two improved differential mode BiCMOS reference voltage circuits and one improved single-end output reference voltage circuit have been proposed in this thesis. The first circuit utilizes the negative temperature coefficient characteristics of a single BJT and the negative temperature coefficient generated from the MOSFET threshold voltage. The second circuit includes a positive temperature coefficient module which is given from the voltage difference at base-emitter junctions of BJT module. In addition, the negative temperature coefficient characteristics is obtained from a single BJT. The positive temperature coefficient characteristics of the third circuit is from a MOSFET module biasing in the weak-inversion region and the negative temperature coefficient is from the MOSFET threshold voltage. The major objective of designing these three circuits is to balance the positive and negative temperature coefficients with appropriate weight ratios, therefore a reference voltage with zero temperature coefficient can be reached.

All of the circuits proposed in this thesis use two different processes parameters, which are TSMC 0.35μm and TSMC 0.18μm, for chip implementation and also use two different circuit software program, HSPICE and Virtuoso ADE (Analog Design Environment), to perform pre-layout and post-layout simulations. After that, all the proposed circuits have been tested. Both pre-layout and post-layout simulation results are consistent with the design theory which prove the feasibility of the circuits. The reference voltage circuit proposed in this thesis also reduce the impact of power supply voltage variations on the output voltage. All of the proposed circuits do not need any operational amplifiers. Hence the circuit structure is simple and uses less chip area to save manufacturing costs. The reference voltage circuit proposed in this thesis can be applied to different circuit designs.

摘要...i
Abstract...ii
誌謝...iii
目錄...iv
表目錄...vi
圖目錄...viii
符號說明...xiv
第一章 緒論...1
1.1積體電路產業的發展介紹與研究背景...1
1.2研究目的與重點...1
1.3論文架構簡介...2
1.4設計流程...2
第二章 參考電壓電路...5
2.1參考電壓電路之介紹與工作原理...5
2.2啟動電路簡介...6
2.3 MOSFET參考電壓電路架構...7
2.3.1 MOSFET參考電壓電路介紹...7
2.3.2 弱反轉區...8
2.4 BJT參考電壓電路架構...10
2.4.1 正溫度係數...10
2.4.2 負溫度係數...11
2.4.3 BJT參考電壓電路...13
第三章 差動模式與單端輸出BiCMOS參考電壓設計實務...15
3.1傳統差動模式參考電壓電路設計...15
3.2第一種差動模式BiCMOS參考電壓電路...17
3.2.1第一種差動模式BiCMOS參考電壓電路分析...17
3.2.2第一種差動模式BiCMOS參考電壓電路模擬結果...19
3.3第二種差動模式BiCMOS參考電壓電路...30
3.3.1第二種差動模式BiCMOS參考電壓電路分析...30
3.3.2第二種差動模式BiCMOS參考電壓電路模擬結果...31
3.4第三種差動模式BiCMOS參考電壓電路...42
3.4.1第三種差動模式BiCMOS參考電壓電路分析...42
3.4.2第三種差動模式BiCMOS參考電壓電路模擬結果...43
3.5第四種差動模式BiCMOS參考電壓電路...55
3.5.1第四種差動模式BiCMOS參考電壓電路分析...55
3.5.2第四種差動模式BiCMOS參考電壓電路模擬結果...56
3.6第五種差動模式BiCMOS參考電壓電路...67
3.6.1第五種差動模式BiCMOS參考電壓電路分析...67
3.6.2第五種差動模式BiCMOS參考電壓電路模擬結果...69
3.7第六種差動模式BiCMOS參考電壓電路...80
3.7.1第六種差動模式BiCMOS參考電壓電路分析...80
3.7.2第六種差動模式BiCMOS參考電壓電路模擬結果...81
3.8一種單端輸出BiCMOS參考電壓電路...92
3.8.1一種單端輸出BiCMOS參考電壓電路分析...93
3.8.2一種單端輸出BiCMOS參考電壓電路模擬結果...94
第四章 晶片下線實作與量測結果...99
4.1全客製化IC設計流程...99
4.2量測方法與量測儀器...100
4.3第一種差動模式BiCMOS參考電壓電路晶片量測...101
4.3.1晶片實體...101
4.3.2晶片量測...102
4.4第二種差動模式BiCMOS參考電壓電路晶片量測...108
4.4.1晶片實體...108
4.4.2晶片量測...109
4.5第三種差動模式BiCMOS參考電壓電路晶片量測...115
4.5.1晶片實體...115
4.5.2晶片量測...116
4.6第四種差動模式BiCMOS參考電壓電路晶片量測...122
4.6.1晶片實體...122
4.6.2晶片量測...123
4.7第五種差動模式BiCMOS參考電壓電路晶片量測...129
4.7.1晶片實體...129
4.7.2晶片量測...130
4.8第六種差動模式BiCMOS參考電壓電路晶片量測...136
4.8.1晶片實體...136
4.8.2晶片量測...137
4.9一種單端輸出BiCMOS參考電壓電路晶片量測...143
4.9.1晶片實體...143
4.9.2晶片量測...144
第五章 結果與討論...147

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