臺灣博碩士論文加值系統

本論文主要探討 Ku-Band 以及 18~24GHz 之低雜訊放大器(Low Noise Amplifier, LNA) 電路，電路採用穩懋半導體公司(WIN Semiconductors Corp)所提供的 0.15μm pHEMT 製程進行設計。電路設計嘗試使用了疊接式架構、串接式架構、迴授式架構及源極電感退化式架構，並對其模擬與量測結果進行分析與比較。

第一部份為 Ku-Band 低雜訊放大器設計，頻段為 12GHz-18GHz，採用串接式架構、迴授式架構及源極電感退化式架構，其中串接式架構可以提供高增益與擁有較佳的隔離度。此低雜訊放大器模擬數值如下，增益為10.0~12.7dB，雜訊指數為2.6~2.8dB，輸入的反射係數為-11.2~-14.9dB，輸出的反射係數為-10.6~-14.6dB，而反向隔離度為-26.7~-31.7dB。

第二部份為 18~24GHz 低雜訊放大器，電路主要架構使用疊接架構、串接式架構以及迴授式架構，同時也使用迴授式架構使增益平坦化以及增加電路的穩定性。此低雜訊放大器所模擬的增益為10.3~13.2dB，雜訊指數為2.4~3.3dB，輸入反射係數為-10.0~-10.8dB，輸出反射係數為-10.5~-17.5dB，而反向隔離度為-30.9~-31.9dB。

In this thesis, the rsearch mainly focused on the design of the Ku-band and 18~24GHz Low Noise Amplifiers(LNA). The circuits adopt the 0.15 pHEMT fabrication process provided by WIN Semiconductors. The circuit design adopted the cascode architecture, cascade architecture, resistance feedback, and inductive source degeneration method. The measured results are compared with the simulation results.

At first, the Ku-band LNA with frequency range is designed which use cascade architecture, resistance feedback, and inductive source degeneration method. The cascode architecture is to improve the Miller effect and eliminate parasitic capacitance. The cascade architecture is to improve the gain and isolation. The simulation results have showed the results of gain 10.0~12.7dB, noise figure 2.6~2.8dB, input return loss -11.2~-14.9dB, output return -10.6~-14.6dB, and isolation -26.7~-31.7dB.

Secondly, the 18~24GHz LNA is designed. The main circuit architecture adopted the cascode architecture, cascade architecture, and resistance feedback. The resistance feedback can provide a flat gain and better stability. The simulation results have showed the results of gain 10.3~13.2dB, noise figure 2.4~3.3 dB, input return loss -10.0~-10.8dB, output return loss -10.5~-17.5dB, and isolation -30.9~-31.9dB.

摘要......i
Abstract......ii
誌謝......iv
目錄......v
表目錄......viii
圖目錄......ix
第一章 緒論......1
1.1 研究背景......1
1.2 研究目的......2
1.3 章節介紹......3
第二章 基本原理......4
2.1 簡介......4
2.2 微帶線......4
2.3 散射參數......4
2.4 雜訊指數(NOISE FIGURE)......6
2.4.1 散射雜訊(SHOT NOISE)......6
2.4.2 熱雜訊(THERMAL NOISE)......7
2.4.3 閃爍雜訊(FLICKER NOISE)......8
2.4.4 高電場擴散雜訊(HIGH-FIELD DIFFUSION NOISE)......9
2.4.5 雜訊指數(NOISE FIGURE；NF)......9
2.4.6 等效雜訊溫度......10
2..4.7 多級放大電路之雜訊計算......13
2.5 米勒效應......14
2.6 線性度(LINEARITY)......16
2.6.1 1DB 增益壓縮點(1DB COMPRESSION POINT, P1DB)......16
2.6.2 第三階截止功率 IIP3(INPUT 3RD-ORDER INTERCEPT POINT,IIP3)......17
2.7 穩定度......18
2.8 GAAS 0.15UM PHEMT 製程簡介......21
2.9 低雜訊放大器架構......21
2.9.1 源極電感退化式寬頻放大器(INDUCTIVE SOURCE DEGENERATION AMPLIFIER)......22
2.9.2迴授式放大器(FEEDBACK AMPLIFIER)......22
2.9.3 疊接式架構(CASCODE CONSTRUCTION)......23
2.9.4 電流再利用架構(CURRENT-REUSE CONSTRUCTION)......24
2.9.5 散佈式放大器(DISTRIBUTE AMPLIFIER)......25
2.9.6 平衡式放大器(BALANCE AMPLIFIER)......25
第三章 Ku-Band 低雜訊放大器設計......27
3.1 簡介......27
3.2 設計方法......27
3.3 電路基本架構......29
3.4 電路架構與布局圖......31
3.5 模擬結果......33
3.6 量測結果......39
3.7 結果與討論......44
第四章 18~24GHz 低雜訊放大器設計......45
4.1 簡介......45
4.2 設計方法......45
4.3 電路基本架構......46
4.4 電路架構與布局圖......48
4.5 模擬結果......50
4.6 量測結果......56
4.7 結果與討論......61
第五章 結論與未來展望......62
參考文獻......63
Extended Abstract......65

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