臺灣博碩士論文加值系統

本論文係針對發光二極體產品，研究新的構型，以及對PLCC (Plastic Leaded Chip Carrier)產品peeling、燒小球造成產品異常的問題，以及晶片pad結構防止漏電進行研究分析並改善；新的CSP (Chip-Scale Package)封裝製程使產品本身的體積及重量達到輕、薄、短小；晶片與外封裝尺寸比例更接近，使光效達到更好的效果；主要運用在新一代手機使用，來減輕手機重量、筆電等多項產品上。另外，針對PLCC發光二極體產品修改製程，研究探討製造過程中因外在儲存、應用環境及使用條件不正確下造成的異常，進行改善並驗證，本實驗主要分兩部份，第一部份即是針對因膠體吸濕膨脹導致銀膠peeling 的問題，進行研究及提出改善方案，此peeling情況發生時，基板與晶粒的間隙變大，使電流流經晶片時，將導致電壓值過高，造成LED (Light-emitting diode) 缺亮的情況。故由製程面提出改善方向，針對銀膠膠量進行優化並監控。再來是針對PLCC產品模擬金球尺寸燒小球打線後，電性異常導致產品功能失效的問題進行分析探討。

This paper focuses on the new configuration of light-emitting diode products, as well as researching and analyzing the problem of product abnormality caused by peeling and burning of Plastic Leaded Chip Carrier (PLCC) products. The new Chip-Scale Package(CSP) packaging process makes the volume and weight of the product itself light, thin and short, chip and outer package size ratio is closer so that the optical efficiency is better. It is mainly used in the new generation of mobile phones to reduce the weight of many products such as mobile phones and laptops. In addition, for the PLCC light-emitting diode product modification process, research and discuss the abnormalities caused by external storage, application environment and incorrect use conditions during the manufacturing process to improve and verify. This experiment is mainly divided into two parts. The first part is to study and propose improvement solutions for the silver paste peeling caused by colloidal absorption of moisture expansion. If there is a peeling condition, the gap between the substrate and the die becomes larger, and when the current flows through the wafer, the voltage value will be too high, which will cause the LED to lack brightness. Therefore, the improvement direction is proposed from the process side, and the amount of silver paste is optimized and monitored. The second part is to analyze and discuss the problem of functional failure caused by electrical abnormality after firing small balls of simulated golden ball size of PLCC products.

摘要..............................................................i
Abstract..............................................................ii
誌謝..............................................................iii
目錄..............................................................iv
表目錄..............................................................vi
圖目錄..............................................................vii
第一章 緒論..............................................................1
1.1 前言..............................................................1
1.2 封裝方式..............................................................2
1.3 研究動機..............................................................3
第二章 實驗設備..............................................................6
2.1 生產儀器..............................................................6
2.2 量測儀器..............................................................8
第三章 實驗流程及方法..............................................................15
3.1 實驗流程..............................................................15
3.2 銲接結球過小之改善方法..............................................................16
3.3 PLCC焊接方式及相關參數概念..............................................................16
3.4 改善晶片pad結構防止漏電方法..............................................................17
第四章 結果與討論..............................................................24
4.1 發光二極體CSP新製程導入..............................................................24
4.1.1 良品率控管..............................................................24
4.1.2 CSP試產實績..............................................................24
4.2 改善PLCC發光二極體焊接結球過小問題..............................................................25
4.2.1 放電棒積碳檢驗..............................................................25
4.2.2 銲線機台EFO間隔警報電壓及短線警報卡控..............................................................25
4.2.3 放電棒位置手法標準化..............................................................25
4.3 改善PLCC發光二極體銀膠peeling之手法..............................................................26
4.4 改善晶片pad結構..............................................................28
4.4.1 分析不同膠徑的晶片Au-Sn金屬層..............................................................28
4.4.2 分析不同膠徑的晶片Au金屬層..............................................................28
4.4.3 改善晶片pad結構..............................................................28
第五章 結論..............................................................41
參考文獻..............................................................42
Extended Abstract..............................................................43

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