臺灣博碩士論文加值系統

本篇論文提出一個具有可適性模式轉換機制之高效率電流式直流對直流轉換器。利用電流感測器的技術，依據負載電流大小而操作在連續導通模式與不連續導通模式間切換之可適性模式轉換機制，使其在不同應用之下皆可達到很高的轉換效率。而為了增加彈性，此模式轉換的基準電流可依據不同的應用以數位方式調整。本篇論文亦提出功率消耗及轉換效率之分析與討論。根據模擬的結果，此直流對直流轉換器的效率高達94%，且最大輸出漣波電壓在20毫伏以下，而輸出電流範圍在50mA到350mA之間。在輸入電壓範圍在2.4V到4.2V之間，直流對直流轉換器之操作頻率為0.3到1.7百萬兆赫。此直流對直流轉換器以TSMC 0.35-um 2P4M CMOS製程實現，晶片大小為2.07mm2。除了外接之電感、電容及回授之電阻，包含功率電晶體及所有的元件都在晶片之中。

In this thesis, presented is a high-efficient current-mode DC-DC converter with adaptive mode-hopping mechanism. By employing a current sensing technique, the mode-hopping mechanism enables the mode switching between CCM and DCM according to the load current so as to maintain a high conversion efficiency regardless of the operational status of the applications. Moreover, the level of the load current for mode switching is programmable depending on the applications. Power loss and conversion efficiency analyses are also studied and presented. According to the simulation results, the efficiency of the DC-DC converter can be up to 94% while the maximum peak-to peak output voltage ripple is less than 20mV and the output current ranges between 50mA and 350mA. The DC-DC converter operates at a switching frequency from 0.3 to 1.7MHz from a supply voltage ranging from 2.4 to 4.2V. The DC-DC converter was implemented in TSMC 0.35-μm 2P4M CMOS process with die size of 2.07 mm2. Except the external inductor, capacitor and feedback resistors, all the devices including the power switches are on chip.

CHINESE ABSTRACT I
ABSTRACT II
LIST OF CONTENTS III
LIST OF TABLES V
LIST OF FIGURES VI
CHAPTER 1 INTRODUCTION 1
1.1 MOTIVATION 1
1.2 TOPOLOGIES OF DC-DC CONVERTER 2
1.2.1 Linear Regulator 2
1.2.2 Inductor-less DC-DC Converter 3
1.2.3 Inductor-based DC-DC Converter 3
1.3 SPECIFICATIONS 4
1.4 THESIS ORGANIZATION 5
CHAPTER 2 FUNDAMENTALS OF DC-DC CONVERTER 7
2.1 TYPE OF THE SWITCHING REGULATOR [11] 7
2.2 VOLT-SECOND BALANCE AND CAPACITOR CHARGE BALANCE. 9
2.3 CONTROL MECHANISM [10] 12
2.3.1 PWM (Pulse Width Modulation) 12
2.3.2 PFM (Pulse Frequency Modulation) 13
2.4 OPERATION MODE 14
CHAPTER 3 PROPOSED SYSTEM BLOCK 17
3.1 CURRENT SENSOR WITH COMPENSATION 18
3.1.1 Active Current Sensor 20
3.1.2 The Loop Analysis of Active Current Sensor 22
3.1.3 Current Compensation 25
CHAPTER 4 MODE-HOPPING MECHANISM [21, 22] 30
4.1 THE MODE-HOPPING MECHANISM 30
4.2 DIGITAL CONTROLLER 33
4.2.1 Self-oscillation [23, 24] 34
4.2.2 Digital Control Circuit 35
CHAPTER 5 EFFICIENCY ANALYSIS 39
5.1 POWER LOSS ANALYSIS [10] 39
5.1.1 Conduction Loss 39
5.1.2 Gate Driving Loss 40
5.1.3 Switching Loss 41
5.2 EFFICIENCY ANALYSIS 42
5.2.1 Efficiency Analysis in CCM [3, 8, 13] 42
5.2.2 Efficiency Analysis in DCM 46
5.2.3 Boundary of CCM and DCM 48
5.2.4 Efficiency Analysis in Idle Mode 51
CHAPTER 6 SIMULATION RESULTS AND TEST BENCH 55
6.1 TEST BENCH SETUP 55
6.2 SIMULATION RESULT 55
6.3 LAYOUT CONSIDERATION 64
6.4 MEASUREMENT RESULT 65
CHAPTER 7 CONCLUSIONS AND FUTURE WORK 74
7.1 CONCLUSIONS 74
7.2 FUTURE WORK 75
BIBLIOGRAPHY 76
PUBLICATIONS LIST 79

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