臺灣博碩士論文加值系統

本論文研製之WLAN/WiMAX雙模接收機降頻器係以TSMC 0.18μm 1P6M CMOS製程製作完成。設計之CMOS RFICs包括：同時共用雙頻帶低雜訊放大器、CMOS寬頻微混頻器以及可切換雙頻帶壓控振盪器。其中同時共用雙頻帶低雜訊放大器經量測結果後，在WLAN 802.11b/g頻帶(2.4GHz)增益為10.3dB，雜訊指數為4.33dB，輸入P1dB為-17dBm，輸入三階截斷點為-7dBm；在WiMAX 802.16d頻帶(3.5GHz)增益為7.8dB，雜訊指數為5.72dB，輸入P1dB為-14dBm，輸入三階截斷點為-5dBm。CMOS寬頻微混頻器經模擬後，頻寬為0.15~3.9GHz，WLAN 802.11b/g頻帶(2.4GHz)轉換增益為3.69dB，輸入P1dB為-10.6dBm，輸入三階截斷點為-2.5dBm；WiMAX 802.16d頻帶(3.5GHz)轉換增益為2.64dB，輸入P1dB為-11.1dBm，輸入第三階截斷點為-3dBm。可切換雙頻帶壓控振盪器經模擬後，其低頻帶和高頻帶操作頻率分別為2.39與3.45GHz，在0~1.5V控制電壓其輸出頻率為2.374~2.419GHz與3.396~3.527GHz，相位雜訊分別為-126.4dBc/Hz@1MHz與-116.7 dBc/Hz@1MHz。

This thesis presents the study and implementation of WLAN/WiMAX dual-mode receiver down-converter in a TSMC 0.18μm 1P6M CMOS process. The design of CMOS RFICs includes concurrent dual-band LNA, CMOS wide-band MICROMIXER and switched dual-band VCO. In the measurement results of concurrent dual-band LNA for WLAN 802.11b/g (2.4GHz), the gain is 10.3 dB, the NF is 4.33 dB, the input at 1-dB gain compression point is -17 dBm, and input at the third order intercept point is -7 dBm. Furthermore, the gain is 7.8 dB, the NF is 5.72 dB, the input at 1-dB gain compression point is -14 dBm, and input at the third order intercept point is -5 dBm for WiMAX 802.16d (3.5GHz). In the simulation results of CMOS wide-band MICROMIXER, the bandwidth is 0.15~3.9 GHz, the conversion gain is 3.69 dB, the input at 1-dB gain compression point is -10.6 dBm and input at the third order intercept point is -2.5 dBm for WLAN 802.11b/g (2.4GHz). Besides, the conversion gain is 2.64 dB, the input at 1-dB gain compression point is -11.1 dBm and input at the third order intercept point is -3 dBm for WiMAX 802.16d (3.5GHz). In the simulation results of switched dual-band VCO, the lower band and higher band of the frequency-controlled ranges are 2.39 GHz and 3.45 GHz respectively. Otherwise, the output frequency with 0~1.5V voltage-controlled are 2.374~2.419 GHz and 3.396~3.527 GHz respectively. The corresponding phase noise are -126.4 dBc/Hz@1 MHz and -116.7 dBc/Hz@1 MHz respectively.

中文摘要…………………………………………………………………i
英文摘要………………………………………………………………...iii
致謝………………………………………………………………...……v
目錄………………………………………………………………...……vi
圖目錄…………………………………………………………………...ix
表目錄………………………………………………………………….xiii
第一章 緒論…………………………………………………………..…1
1.1 無線通訊網路簡介………………………………….…………1
1.2 WiMAX系統簡介………………………………..……………..3
1.3 研究動機……………………………………………………….5
1.4 各章提要…………………………………………………….…7
第二章 CMOS低雜訊放大器之設計…………………………………..8
2.1 簡介…………………………………………………………….8
2.2 低雜訊放大器基本概念……………………………………….8
2.2.1 雜訊源…………………………………………………..8
2.2.2 雜訊指數………………………………………………11
2.2.3 1-dB壓縮點………………………………………….…12
2.2.4 諧波失真………………………………………………13
2.2.5 交互調變失真…………………………………………13
2.3 WLAN/WiMAX同時共用雙頻帶低雜訊放大器之設計……15
2.3.1 電路架構………………………………………………15
2.4 電路模擬與量測結果………………………………………...21
2.5 結果與討論…………………………………………………...26
第三章 CMOS混頻器之設計…………………………………………27
3.1 簡介………………………………………….………………..27
3.2 混頻器基本概念………………….……………………27
3.2.1 混頻器參考規格………………………………………27
3.2.2 混頻器種類……………………………………………31
3.2.3 被動式混頻器架構……………………………………36
3.2.4 主動式混頻器架構……………………………………36
3.2.5 雙平衡式混頻器操作原理……………………………37
3.3 WLAN/WiMAX CMOS寬頻微混頻器之設計………40
3.3.1 電路架構………………………………………………40
3.4 電路模擬結果………………….……………………………..44
3.5 結果與討論…………………………………………………...50
第四章 CMOS壓控振盪器之設計……………………………………51
4.1 簡介…………………………………………………………...51
4.2 振盪器基本概念……………………………………………...51
4.2.1 振盪條件………………………………………………51
4.2.2 相位雜訊………………………………………………52
4.3 壓控振盪器基本原理…………………….…………………..53
4.4 WLAN/WiMAX可切換雙頻帶壓控振盪器之設計.…………56
4.4.1 電路架構………………………………………………56
4.5 電路模擬結果………………………………………………...61
4.6 結論與未來工作……………………………………………...65
第五章 結論……………………………………………………………66
參考文獻………………………………………………………………..68

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