臺灣博碩士論文加值系統

本論文以TSMC 0.18μm 1P6M CMOS製程來研製應用於UWB無線通訊射頻接收機前端電路設計，包含低雜訊放大器、混頻器以及壓控振盪器。
低雜訊放大器的電路設計上，在前端使用LC-tank減少輸入阻抗的返回損耗並可減少由負回授所帶來的雜訊干擾；同時使用正回授電路，可在低功率的情況下得到高增益。量測結果低雜訊放大器放大頻率為2.4至3.5 GHz，增益為6 ~ 9 dB，雜訊指數為4.5 dB左右，輸入P1dB為-15 dBm。主動雙端平衡混頻器電路設計上，主要是使用MGT (Multiple Gated Transistors)的方式達到高線性度，並且使用電流摺疊的方式達到低功率效果，其模擬結果為操作頻率在3 ~ 6 GHz時，其轉換增益為4 ~ 7 dBm，雜訊指數為11 dB左右，輸入P1dB為-5 dBm，輸入三階截斷點為5 dBm。雙頻帶壓控振盪器的電路設計主要是藉由切換電容達到雙頻帶效果，同時使用電晶體交連耦合對(cross-coupled pair)並聯達到低相位雜訊的效果，其模擬結果操作頻率分別為4.72與5.42 GHz，在0 ~ 1.2 V控制電壓其輸出頻率為4725 ~ 5003 MHz與5421 ~ 5837 MHz，相位雜訊分別為-122.36 dBc/Hz@1 MHz與-121.6 dBc/Hz@1 MHz。

This thesis presents the developments of receiver RFICs for Ultra-Wide Band (UWB) system with the TSMC 0.18um 1P6M CMOS process. The designed ICs include low noise amplifier (LNA), down-convert mixer, and voltage control oscillator (VCO).
The circuit design of LNA uses a LC-tank to reduce the input return loss and the noise from the resistive negative feedback. The LNA also employs the positive-feedback capacitor to acquire the higher gain with low DC power consumption. The measured performances are as follows: the bandwidth 2.4 ~ 3.5 GHz, gain in 6 ~ 9 dB, noise figure in 4.5 dB, and input 1 dB gain-compression point in ?{15 dBm.
The circuit design of mixer uses the Multiple-Gated-Transistors (MGT) to achieve the higher linearity and the current-folded configuration to lower the DC power consumption. The simulation performances are as follows: the bandwidth 3 ~ 6 GHz, gain in 4 ~ 7 dB, noise figure in 11 dB, input 1 dB gain-compression point in ?{5 dBm, and the input third-intercept-point in about 5 dBm.
The circuit design of VCO uses the method of switching capacitors to accomplish the dual-band function while the two cross-coupled pair architecture maintain the low phase noise characteristics. The simulation performances are as follows: frequency-controlled ranges 4.725~5.003 GHz and 5.421~5.837 GHz with phase noise of ?{122.36 dBc/Hz at 1 MHz frequency offset and ?{121.6 dBc/Hz at 1 MHz frequency offset respectively.

第一章 緒論
1-1 簡介…………………………………………………........……………………….1
1-2 研究動機………………………………………………………………………….5
1-3 章節概述…………….……………………………………………………………5

第二章 接收機架構介紹
2-1 接收機基本概念介紹…………………………………………………………….7
2-2 超外差接收機架構.................................................................................................8
2-2-1 鏡像頻率………………………………………………………………….9
2-2-2 中頻頻率選擇....…………………...……………………………………11
2-2-3 半中頻影響……………………………………………………………...13
2-2-4 雙中頻架構............……………………………………………………...14
2-3 直接降頻接收機架構…………………………….……………………..………15
2-3-1 直流偏移………………………………………………………...………16
2-3-2 偶次階失真…………………………………………...…………………17
2-3-3 顫動雜訊………………………………………………………………...18
2-3-4 正交信號的不匹配……………………………………………………...18
2-3-5 本地信號洩漏........……………………………………………………...19
2-4 鏡像消除接收機架構…………………………………………………………...20
2-4-1 Hartley架構……………………………………………………………..20
2-4-2 Weaver架構……………………………………………………………..24
2-5 數位中頻接收機………………………........…………………………………...26


第三章 CMOS低雜訊放大器之設計
3-1簡介…………................................................................…………………………27
3-2 雜訊.............................................................……………………………………..27
3-2-1 雜訊源………………........……………………………………………...27
3-2-2 雜訊指數…....…………………………………………………………...28
3-2-3 串接雜訊指數計算…....………………………………………………...30
3-2-4 損耗電路之雜訊指數…………………………………………………...32
3-2-5 接收機靈敏度…...……………………………………………………...33
3-3 低雜訊放大器規則與設計原理…................…………………………………...34
3-3-1 電路設計架構…………………………………………………………...35
3-3-2 輸入輸出匹配設計……………………………………………………...36
3-3-3 MOS元件雜訊模型推導……………………………...………………...37
3-3-4 古典雙埠雜訊理論……………………………………………………...38
3-4 具增益控制之寬頻帶低功率低雜訊放大器設計............................…………...40
3-5 電路模擬與量測結果比較..............................................................…..………...48
3-5-1 結果與討論....…………………………………………………………...51
第四章 CMOS高線性混頻器設計
4-1 簡介…........................................………………………………………………...53
4-2 線性度.................................……………...……………………………………...53
4-3 混頻器的規格與種類....................................…………………………………...57
4-3-1 混頻器規格…………………....………………………………………...57
4-3-2 混頻器種類…………………....………………………………………...59
4-3-3 雙平衡混頻器操作原理………........................………………………...62
4-4 寬頻高線性低功率混頻器設計....................…....……………………………...64
4-5 電路模擬與量測結果比較....................…............……………………………...69
4-5-1 結果與討論....……………………………………………………...........74
第五章 無線區域網路雙頻帶壓控振盪器設計
5-1 簡介…........................................………………………………………………...75
5-2 振盪器規格.................................………...……………………………………...75
5-3 振盪器設計原理....................................…........………………………………...78
5-3-1 LC-諧振(tank)振盪器……………….…………………………………...78
5-3-2 相位雜訊………....…………....………………………………………...80
5-4 雙頻帶低功率低相位雜訊壓控振盪器設計……………....................………...83
5-5 電路模擬結果……………................................................................…………...89
5-5-1 結論與未來工作…………………………………………………...........93
第六章 結論……………………………………………………….............……...94

參考文獻…………………………………………..……………………………….95

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