臺灣博碩士論文加值系統

本論文提出可適用於可攜式裝置之高精準度能隙參考電壓電路、高效率升壓轉換器與高效率降壓轉換器。高精準度能隙參考電壓電路使用創新的V型曲率校正技術，在寬廣的溫度範圍(−40°C至140 °C)操作下，大幅減少參考電壓對溫度變化的變異，所獲得的最佳溫度係數為4.06 ppm /°C，相較於傳統能隙參考電壓電路的溫度係數，具有76%的改善。
另外，本論文也提出新型不連續導通模式控制技術與可適應性峰值電流控制技術來提高電壓轉換器的功率轉換效率與輸出漣波電壓。實現於升壓轉換器的新型不連續導通模式控制技術，可準確感測釋能狀態電感電流的變化，當電感電流釋放至零時，升壓轉換器即進入不連續導通模式操作，這完全杜絕逆向電感電流的產生和提升功率轉換效率，在1–50mA負載電流操作可獲得90.3–95.03%的功率轉換效率。具可適應性峰值電流控制的降壓轉換器在不同負載電流操作時，將產生不同的峰值電感電流，來讓儲存能量得到最佳的利用，進而提升功率轉換效率和改善輸出漣波電壓，在1–200mA負載電流操作可獲得91.04–94.62%的功率轉換效率，另外，負載電流1mA的操作下，將輸出漣波電壓從14.9mV改善至5.19mV。本論文的電路設計與晶片製作皆使用台灣積體電路製造股份有限公司 0.18-μm 1P6M CMOS製程。

A high-precision bandgap reference voltage circuit, a high-efficiency boost converter, and a high-efficiency buck converter for portable devices are presented in this thesis. The high-precision bandgap reference voltage circuit with an innovative v-curve correction technique markedly reduces reference voltage variations under a wide temperature range. The best temperature coefficient of the proposed bandgap reference is 4.06 ppm/°C that has a 76% improvement compared to that of the conventional bandgap reference voltage circuit over a wide temperature range of −40°C to 140 °C.
In addition, a novel discontinuous conduction mode (DCM) control technique and an adaptive peak current control technique are proposed to improve the power conversion efficiency and the output ripple voltage of power converters in this study. The proposed boost converter with a DCM control technique can accurately sense the variations of the inductor current in the released state. When the inductor current is released to zero, the boost converter operates in the DCM mode to eliminate a reverse inductor current and improves power conversion efficiency. The experimental results revealed that the power conversion efficiency is achieved from 90.3% to 95.03% at a load current range of 1 – 50 mA. The proposed buck converter with an adaptive peak current control will generate different peak inductor currents to optimize the stored energy and improves power conversion efficiency when the load current varies in the different applications. The experimental results show that the power conversion efficiency of the proposed buck converter is achieved from 91.04 to 94.62% at a load current range of 1 – 200 mA. Furthermore, the output ripple voltage is improved from 14.9 mV to 5.19 mV at a load current of 1 mA. All circuits were designed and fabricated using a standard TSMC 0.18-μm 1P6M CMOS technology.

摘要…i
Abstract…ii
誌謝…iv
目錄…v
表目錄…viii
圖目錄…ix
第一章 緒論…1
1.1 背景簡介…1
1.2 研究動機…2
1.3 論文架構…2
第二章 高精準度能隙參考電壓電路…3
2.1 能隙參考電壓電路…3
2.2 負溫度係數電流…4
2.3 正溫度係數電流…6
2.4 低電壓能隙參考電壓電路…7
2.5 V型曲率校正…9
2.6 高精準度能隙參考電壓電路…11
2.6.1 補償溫度區域的邊界設計…11
2.6.2 低溫度區間補償電流設計…11
2.6.3 高溫度區間補償電流設計…11
2.7 啟動電路…15
2.7.1 典型啟動電路…15
2.7.2 改良的啟動電路…17
2.8 結果與討論…18
第三章 具新型不連續導通控制之高效率升壓轉換器…21
3.1 直流轉直流升壓轉換器…21
3.1.1 非同步整流操作…21
3.1.2 同步整流操作…23
3.1.3 功率轉換效率…24
3.2 具新型不連續導通模式(DCM)控制之高效率升壓轉換器電路…27
3.3 電流感測器…28
3.3.1 峰值電流感測器(Peak Current Sensor)…28
3.3.2 近零電流感測電路(Near-Zero Current Sensor)[21]…31
3.4 關閉時間產生電路…35
3.5 不連續導通模式控制器(DCM Controller)…37
3.5.1 逆向電感電流…39
3.5.2 不連續導通模式控制電路…43
3.5.3 實驗結果…46
3.6 抗振鈴電路…48
3.7 實驗結果…51
3.7.1 Post-Layout Simulation…51
3.7.2 量測結果…53
3.7.3 整體電路效能…57
第四章 具可適應性峰值電流控制之降壓轉換器…58
4.1 脈波頻率調變之降壓轉換器…58
4.1.1 工作週期分析…60
4.1.2 輸出漣波電壓分析…62
4.1.3 導通損失…63
4.2 具可適應性峰值電流控制之降壓轉換器電路…64
4.2.1 具新型不連續導通模式控制之降壓轉換器…64
4.2.2 可適應性峰值電流控制之降壓轉換器整體電路架構…67
4.3 可適應性峰值電流控制器…68
4.3.1 可適應性峰值電流控制器電路操作說明…69
4.3.2 可適應性峰值電流控制器電路…71
4.4 限制電壓電路…72
4.5 實驗結果…77
4.5.1 Post-Layout Simulation…77
4.5.2 量測結果…81
4.5.3 整體電路效能…85
第五章 結論與未來展望…86
參考文獻…87
Extended Abstract…89

[1]A. Bakker and J. Huijsing, High-Accuracy CMOS Smart Temperature Sensors. New York, NY, USA: Springer, 2001.
[2]K. N. Leung and P. K.T. Mok, “A sub-1-v 15-ppm/°C CMOS bandgap voltage reference without requiring low threshold voltage device,” IEEE Journal of Solid-State Circuits, vol. 37, no. 4, pp. 526-630, Apr. 2002.
[3]K. N. Leung, P. K. T. Mok, and C. Y. Leung, “A 2-v 23-μA 5.3-ppm/°C curva-ture-compensated CMOS bandgap voltage reference,” IEEE Journal of Solid-State Circuits, vol. 38, pp. 561-564, Mar. 2003.
[4]J. Sheng, Z. Chen, and B. Shi, “A 1v supply area effective CMOS bandgap reference,” International Conference on ASIC, 2003.Proceedings, vol. 1, pp. 619-622, Oct. 2003.
[5]X. Ming, Y. Q. Ma, Z. K. Zhou, and B. Zhang, “A high-precision compensated cmos bandgap voltage reference without resistors,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 57, no. 10, pp. 767-771, Oct. 2010.
[6]J. H. Li, X. B. Zhang and M. Y. Yu, “A 1.2-v piecewise curvature-corrected bandgap ref-erence in 0.5μm CMOS process,” IEEE Trans. Very Large Scale Integr.(VLSI) Syst., vol. 19, no. 6, pp. 1118-1122, Jun. 2011.
[7]Z. K. Zhou, Y. Shi, Z. Huang, P. S. Zhu, Y. Q. Ma, Y. C. Wang, Z. Chen, X. Ming and B. Zhang “A 1.6-v 25-μA 5-ppm/°C curvature-compensated bandgap reference,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 59, no. 4, pp. 677-684, Apr. 2012.
[8]C. M. Andreou, S. Koudounas and J. Georgiou, “A novel wide-temperature-range, 3.9 ppm/°C CMOS bandgap reference circuit,” IEEE Journal of Solid-State Circuits, vol. 47, no. 2, pp. 574-581, Nov. 2012.
[9]B. Ma and F. Yu, “A novel 1.2–v 4.5-ppm/°C curvature-compensated cmos bandgap ref-erence,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 61, no. 4, pp. 1026-1035, Apr. 2014.
[10]Q. Duan, and J. Roh, “A 1.2–v 4.2-ppm/°C high-order curvature-compensated CMOS bandgap reference,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 62, no. 3, pp. 662-670, Mar. 2015.
[11]H. M. Chen, C. C. Lee, S. H. Jheng, W. C. Chen, and B. Y. Lee, “A sub-1 ppm/°C preci-sion bandgap reference with adjusted-temperature-curvature compensation,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 64, no. 6, pp. 1308-1317, Jun. 2017.
[12]P. Malcovati, F. Maloberti, C. Fiocchi, and M. Pruzzi, “Curvature-compensated bicmos bandgap with 1-v supply voltage,” IEEE Journal of Solid-State Circuits, vol. 36, no. 7, pp. 1076-1081, Jul. 2001.
[13]A. B. Gomez, T. L. Viswanathan, and T. R. Viswanathan, “A low-supply-voltage cmos sub-bandgap reference,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 55, no. 7, pp. 609-613, Jul. 2008.
[14]J. M. Redoute, and M. Steyaert, “Kuijk bandgap voltage reference with high immunity to emi,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 57, no. 2, pp. 75-79, Feb. 2010.
[15]L. Magnelli, F. Felice, P. Corsonello, C. Pace, and G. Iannaccone, “A 2.6nw, 0.45 v tem-perature-compensated subthreshold cmos voltage reference,” IEEE Journal of Solid-State Circuits, vol. 46, no. 2, pp. 465-474, Feb. 2011.
[16]R. Argones, J. Oliver, and C. Ferrer, “Very low power supply dependence roic for capaci-tive sensing platforms,” IEEE Sensors Journal, vol. 14, no. 4, Apr. 2014.
[17]K. K. Lee, T. S. Lande, and P. D. Hafliger, “A sub-μw bandgap reference circuit with an inherent curvature-compensation property,” IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 62, no. 1, pp. 1-9, Jan. 2015.
[18]C. Yu and L. Siek, “An area-efficient current-mode bandgap reference with intrinsic ro-bust start-up behavior,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 62, no. 10, pp. 937-941, Oct. 2015.
[19]J. Jiang, W. Shu, and J. S. Chang, “A 5.6 ppm/°C temperature coefficient, 87-db psrr, sub-1-v voltage reference in 65-nm cmos exploiting the zero-temperature-coefficient point,” IEEE Journal of Solid-State Circuits, vol. 52, pp. 623-633, Mar. 2017.
[20]C. Y. Leung,P. K. T. MOK and K. N. Leung, “A 1-V integrated current-mode boost con-verter in standard 3.3/5-V CMOS technologies, ”IEEE Journal, Solid-State Circuits, vol. 40,no. 11,pp. 2265-2274,2005.
[21]X. Jing and P. K. T. Mok, “A fast fixed-frequency adaptive-on-time boost converter with light load efficiency enhancement and predictable noise spectrum,” IEEE J. Solid-State Circuits, vol. 48, no.10, pp. 2442–2456, Oct. 2013.
[22]B. Sahu and G.A. Rincon-Mora. “An accurate, low-voltage, CMOS switching power sup-ply with adaptive on-time pulse-frequency modulation (PFM) control.” IEEE Transactions on Circuits and Systems I: Regular Papers, vol.54, pp.312-321, No.2, Feb. 2007.
[23]Y. Gao, S. Wang, H. Li, L. Chen, S. Fan and L. Geng, “A novel zero-current-detector for DCM operation in synchronous converter, ” IEEE International Symposium on Industrial Electronics (ISIE), pp.99-104, May 2012.
[24]H. M. Chen, H. C. Huang, S. H. Jheng, H. T. Huang, and Y. S. Huang, "High-Efficiency PFM Boost Converter with an Accurate Zero Current Detector." IEEE Transactions on Circuits and Systems II, 2017.
[25]H. H. Wu, C. L. Wei, and Y. C. Hsu, “Adaptive Peak-Inductor-Current-Controlled PFM Boost Converter with a Near-Threshold Startup Voltage and High Efficiency,” IEEE Trans. Power Electron, vol. 30, no. 4, pp. 1956-1965,April 2015.
[26]Jung, Dong-Hoon, et al. "0.293-mm2 Fast Transient Response Hysteretic Quasi-V2 DC–DC Converter with Area-Efficient Time-Domain-Based Controller in 0.35-μm CMOS." IEEE Journal of Solid-State Circuits, vol.53, no.6, pp. 1844-1855, 2018.
[27]W. Fu, S. T. Tan, M. Radhkrishnan, R. Byrd, and A. A. Fayed, “A DCMonly buck regu-lator with hysteretic-assisted adaptive minimum-on-time control for low-power microcon-trollers,” IEEE Trans. Power Electron., vol. 31, no. 1, pp. 418–429, Jan. 2016.
[28]Y. Hwang, A. Liu, Y. Chang, and J. Chen, “A high-efficiency fast-transient-response buck converter with analog-voltage-dynamicestimation techniques,” IEEE Trans. Power Elec-tron., vol. 30, no. 7, pp. 3720–3730, Jul. 2014.
[29]J. J. Chen, Y. S. Hwang, J. H. Yu, Y. T. Ku and C. C. Yu, “A Low-EMI Buck Converter Suitable for Wireless Sensor Networks With Spur-Reduction Techniques,” IEEE Sensors J., vol. 16, no. 8, pp. 2588-2597, April 15, 2016.